NCORE Embedded Engineering
SoC, FPGA, ASIC, and Digital Signal Processing
Our team has hands-on experience with digital ASIC and FPGA design, as well as signal processing hard and soft implementation.
We are engaged in highly complex sensor fusion solutions on high-speed FPGA multi-Gigabit and Multi Channel-based (Zynq) HIL systems.
Fast and secure communication is our expertise. We know how to implement 802.11ad WiGig, direct multigigabit wireless communication for extreme data quantities with high transfer speed on shorter distances. In parallel to that, we bear a very important knowledge essential in the growing IoT world – Wi-Fi HaLow where a significant amount of data is sent on long distances.
Our team members are experts in custom industrial WiFi-based systems, with tailored application-driven MACs, robust tailored channel coding, and hardwired encryption.
We work on custom SoC digital and AMS designs for sensor data processing.
We have invested significant efforts in algorithm design, and its digital processing hardwired and SW implementation for radar-based sensors.
Design Validation
NOVELIC engineer working on signal processing using own NOVELIC hardware
FPGA, ASIC, and Digital Signal Processing Workflow
FPGA, ASIC, and Digital Signal Processing Skills
Work domain | Tools |
---|---|
Modeling | MATLAB and Simulink, SystemC and C/C++, Python |
RTL Design and Simulation | VHDL, Verilog, SystemC, Mentor Visual Elite, Xilinx System Generator, Cadence Incisive (NC Sim, Sim Vision), Xilinx ISE Simulator, Mentor ModelSim |
ASIC Implementation Chain | Cadence First Encounter, Synopsis Design Compiler Graphical |
FPGA Implementation Chain | Xilinx: Vivado, System Generator, Xilinx ISE, etc. Altera: Quartus, Nios II, etc. |
Software Development and Testing Tools | C/C++, PythonScripting, Tcl, Perl, shell |
Verification and Validation | SystemC/Verilog/VHDL/Simulink testbenches Back- annotated simulations at all design flow points RTL verification using scripts for regression (shell, Perl, Tcl) Specman, UVM, System Verilog Hardware-in-the-loop testing on FPGA prototypes Field trials deployment and assessment |
NOVELIC has in-depth expertise for custom industrial proprietary WiFi Systems, with tailored hardwired (VHDL & Verilog):
- Modulation schemes
- Channel coding
- Encryption
- MAC supporting specific structure of the end-product logic channels
This provides a direct match to the application enabling full robustness.
Xilinx ZynQ FPGA Based HIL Systems
FPGA, ASIC, and Digital Signal Processing Project Examples
- 802.11b/g- based PHY and MAC layer for a real-time conference system / Tech: FPGA
- 802.11ad (WiGig) MAC layer Prototype / Tech: FPGA
- 802.11ad (WiGig) MAC layer / Tech: ASIC 28nm CMOS
- Video Communication Link for Drones based on 802.11ah Standard (WiFi HaLow) / Tech: FPGA
- 3Gbps ECMA-387 Transceiver / Tech: FPGA
Industrial ASIC/FPGA
- High-Speed Multi-Channel Data Logger on ZynQ
- Multi Mbps custom communication protocol for industrial sensor communication, with low latency.
- Tech: FPGA
- Intelligent Battery Sensor with LIN Interface
- Tech: ASIC 130nm CMOS
- Hall Sensor Controller
- Tech: ASIC 350nm CMOS
- Power Management Controller
- Front End Design in Verilog
Signal Processing and Image Processing
- MPEG-2 10Mbs Video Link with ultra-low latency
- Tech: FPGA
- HW accelerators in a 2015 tablet
- Tech: ASIC 22nm CMOS
- Wavelet transforms of thermal camera video to get a heartbeat
- Tech: Modelling (Matlab and Python)
- Sensor fusion algorithmic (MEMS, Temperature, Magnetic Sensors…)
- Tech: Modelling (Matlab)